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CXA2550M/N
RF Amplifier for CD Players
Description The CXA2550M/N is an IC developed for compact disc players. This IC incorporates an RF amplifier, focus error amplifier, tracking error amplifier, APC circuit and RF level control circuit. (The voltageconverted optical pickup output is supported.) Features * Low power consumption (35mW at 3.5V) * APC circuit * RF level control circuit * Both single power supply and dual power supply operations possible. Structure Bipolar silicon monolithic IC Applications Compact disc players Block Diagram and Pin Configuration (Top View)
18 AGCCONT (50%/30%/OFF)
CXA2550M 20 pin SOP (Plastic)
CXA2550N 20 pin SSOP (Plastic)
Absolute Maximum Ratings (Ta = 25C) 12 V * Supply voltage VCC * Operating temperature Topr -20 to +75 C * Storage temperature Tstg -65 to +150 C * Allowable power dissipation PD (SOP) 620 mW (SSOP) 370 mW Operating Conditions Supply voltage VCC - VEE
3.0 to 4.0
V
19 LD_ON
15 RF O
14 RFM
13 FE
12 FE_BIAS
17 RFTC
16 RF I
20 VCC
VCC
174k
11 TE 30k 30k 30k VC 10 49 96k VC 15k VEE TRACKING ERROR VC AMP
VC
VCC
15k
6k 54k
13.4k 50A 670mV
VEE
154k FOCUS ERROR AMP 87k 32k 13k 32k 24p VC 260k 8 E VC VC VC 7 26k 12p 12p 13k F
24p
56k APC LD AMP
56k
10k
VC
2k
10k
10k
1k
VCC
55k
VEE VREF 1.25V
VC
2k
APC PD AMP
8k 6p 2k
8k 6p
10k
10k
VEE
10k
VC VC
2
5
VC
VEE VC
VC
260k
2k
25k
1
4
3
6
PD1
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
AGCVTH
PD2
-1-
VEE
LD
PD
EI
9
VCC
30k
95k
E97514B25
CXA2550M/N
Pin Description Pin No. Symbol I/O Equivalent circuit Description
50 147
1
AGCVTH
--
1 13.4k 10
Reference level variable pin for RF level control. The reference level can be varied by the external resistor.
10k
2
LD
O
2 1k
APC amplifier output pin.
20 8
3
PD
I
147 3
55k 10k
APC amplifier input pin.
10k
4 5
PD1 PD2
I I
4 5 100
Inversion input pin for RF I-V amplifiers. Connect these pins to the photodiodes A + C and B + D respectively. The current is supplied.
6
VEE
--
6
VEE
VEE pin.
-2-
CXA2550M/N
Pin No.
Symbol
I/O
Equivalent circuit
12p 260k
Description
7 8
F E
I I
7 8 10
Inversion input pin for F and E I-V amplifiers. Connect these pins to the photodiodes F and E respectively. The current is supplied.
13k 26k
9
EI
--
147 9
260k
Gain adjustment pin for I-V amplifier.
VCC
VCC 200
10
VC
O
10
50
120
15k
120 16k
DC voltage output pin of (Vcc + VEE)/2. Connect to GND for 1.75 power supply; connect a smoothing capacitor for single +3.5V power supply.
VEE
11
TE
O
11 96k 300
Tracking error amplifier output pin. E-F signal is output.
-3-
CXA2550M/N
Pin No.
Symbol
I/O
Equivalent circuit
Description
32k 164k 12
12
FE_BIAS
I
24p
174k 10
Bias adjustment pin for inverted side of focus error amplifier.
24p
13
FE
O
13 174k 300
Focus error amplifier output pin.
2k 2k 147
14
RFM
I
14 850 1m
RF amplifier inverted side input pin. RF amplifier gain is determined by the resistor connected between this pin and RFO pin.
15
RF O
O
147 15 60k 1m
RF amplifier output pin.
-4-
CXA2550M/N
Pin No.
Symbol
I/O
Equivalent circuit
Description
147 16
16
RF I
I
15k
The RF amplifier output RFO is input with its capacitance coupled.
20
17
RFTC
--
147 17 50
50
External time-constant pin for RF level control.
10
15 147
15
18
AGCCONT
I
18 50k 7
RF level control ON (limit level of 50%/30%)/OFF switching pin. OFF for Vcc, 30% for open or Vc and 50% for VEE.
50 147
19
LD_ON
I
19 VREF
APC amplifier ON/OFF switching pin. OFF for Vcc and ON for VEE.
20
VCC
20
VCC
Vcc pin.
-5-
Electrical Characteristics
Bias conditions 7 O O 15 Input resistance 33k -50.0 16.7 -3 1.45 -- -120.0
Output AC measurement Output AC measurement Output DC measurement Output AC measurement Output AC measurement Output DC measurement Output DC measurement Output DC measurement
(Ta = 25C, VCC = 1.75V, VEE = -1.75V, VC = GND)
SW conditions 5 20 Input GND 6.37 9.8 6 Input GND -10 19.7 -- -- -- 0 16.4 16.4 -3.0
Output DC measurement Output DC measurement
1
2
Current consumption
ICC
Measurement pin
No. Measurement item Symbol 6 8 I1 E2 E3 E4 I2 E1 Min. Typ.
1
2
3
4
Description of I/O waveform and measurement method Max. Unit 13.23 mA
IEE
-13.23 -9.8 -6.37 mA 60.0 22.7 -- -- -1.25 mV dB dB V V 120.0 mV 19.4 19.4 0 -- 1.25 -- -- 22.4 22.4 3.0 -1.25 -- dB dB dB V V
3 15 Input 1kHz 120mVp-p 15 Input 3MHz 120mVpp O O 13 Input resistance 33k 13 Input 1kHz 120mVp-p 13 Input 1kHz 120mVp-p 13 O O 300mV 13 11 Input resistance 390k 11 Input 1kHz 240mVp-p O 11 Input 1kHz 240mVp-p 11 O OO 450A 570A 0A 0.8mA 0A 1V 2.7V 2.7V 2.7V 2.7V 2.0V 2.0V 0.5V 2.0V 1V 11 11 2 2 2 LD OFF 2 V11-4 = V11-2 - V11-3
Output DC measurement Output DC measurement Output DC measurement Output DC measurement Output DC measurement Output DC measurement
Offset voltage 1
V15-1
4
Voltage gain
V15-2
OO
5 300mV 15 15 -300mV
Frequency response
V15-3
RF amplifier
6
Maximum output amplitude H
V15-4
OO
7
Maximum output amplitude L
V15-5
OO
8
Offset voltage
V13-1
9
Voltage gain 1
V13-2
O
10
Voltage gain 2
V13-3
O
12 300mV 13
FE amplifier
18
TE amplifier
CXA2550M/N
22
APC
-6-
11
Voltage gain difference
V13-4
V13-4 = V13-2 - V13-3
Maximum output amplitude L
V13-5
O
13
Maximum output amplitude H
V13-6
O
14
Offset voltage 1
V11-1
Output DC measurement Output AC measurement Output AC measurement
-50 7.3 7.3 -3.0 1.25 --
0 10.3 10.3 0 -- -- -830 -330 470 970 1400 1590 -600 --
50 13.3 13.3 3.0 -- -1.25 170 1470 -- 100
mV dB dB dB V V mV mV mV mV
15
Voltage gain 1
V11-2
O
16
Voltage gain 2
V11-3
17
Voltage gain difference
V11-4
Maximum output amplitude H
V11-5
O
19
Maximum output amplitude L
V11-6
20
Output voltage 1
V2-1
21
Output voltage 2
V2-2
Output voltage 3
V2-3
23
Maximum output amplitude
V2-5
O
SW conditions 5 800A 50mV 700A 50mV O O 18 18 18 O 10
Output DC measurement
Bias conditions 7 0.5V/ 2.7V 2.0V 2.0V 2.0V 2.0V 2 700 2.7 1.3 -- -100 2 700 2 -1700 -1163 -200 1471 1900 1204 1700 -- -- -- -- -- 2.2 0.5 100 2 -1900 -1322 -100 1.3V/ 2.7V 800mV 800mV 0.5V/ 2.7V 2.2V/ 2.7V Level control: -30% - Level control OFF Level control: -50% - Level control OFF Level control: 30% - Level control OFF Level control: 50% - Level control OFF mV mV mV mV V V V mV 8 I1 E2 E3 E4 I2 E1 Description of I/O waveform and measurement method Min. Typ. Max. Unit
No. Measurement item Symbol 6
24
50% limit
V2-7
OO
25 O 230A 320A O
30% limit
V2-8
OO
RF level control
26
-50% limit
V2-9
27
-30% limit
V2-10
28
High Level
V18-1
29
Middle Level
V18-2
31
Center output voltage V10-1
AGCCONT
30
Low Level
V18-3
Measurement pin
1
2
3
4
-7-
Note) O in the SW conditions 7 represents the OFF state.
CXA2550M/N
Electrical Characteristics Measurement Circuit
GND R11 1M VEE E4 20 19 18 17 16 11 15 14 12 13 E3 S8 R9 5.5k VEE C2 0.1 E2 R10 10k R8 10k R7 10k R6 10k
VEE VEE VEE GND GND GND GND GND GND
C3 33
FE
VCC
RF I
LD_ON
RFTC
RF O
RFM
AGCCONT
AGCVTH
PD1
PD
VEE
LD
PD2
E
EI
FE_BIAS
1 2 3 R2 33k S2 S3 S4 S6 VCC VCC VEE GND VEE GND AC R3 33k C1 33 R4 390k 7 S1 I2 I1 0.8mA R1 300 4 8
5
6
F
9 R5 390k S5
10 S7
GND
E1
GND CXA2550M/N
VC
TE
-8-
CXA2550M/N
Description of Functions RF Amplifier The photodiode current input to the input pins (PD1, PD2) are current-to-voltage (I-V) converted by the equivalent resistance of 58k at PD I-V amplifiers, respectively. The signal is added by the RF summing amplifier and then the I-V converted output voltage of the photodiode (A + B + C + D) is output to RFO pin. This pin is used check the eye pattern.
Cp RFM 58k 33k PD1 I-V 2k
5.5k RFO
14
15
4
VA PD1 IV AMP 58k
RF SUMMING AMP
33k PD2 I-V
5
VB
2k
GND
PD2 IV AMP
The frequency response of the RF output signal can be equalized by adding the capacitance (Cp) to RFI pin. The low frequency component of the RFO output voltage is as follows; VRFO = -2.75 x (VA + VB) = 159.5k x (iPD1 + iPD2)
Focus Error Amplifier The difference between the RF I-V amplifier output VA and VB is obtained and the I-V converted voltage of the photodiode (A + C - B - D) is output.
24p 174k VB VA 32k 13 FE 32k 24p 87k 164k
- (B + D) - (A + C)
FE BIAS 12
VEE 47k
VCC
The FE output voltage (low frequency) is as follows; VFE = 5.4 x (VA - VB) = (iPD2 - iPD1) x 315k -9-
CXA2550M/N
Tracking Error Amplifier Each signal current from the photodiodes E and F is I-V converted and input to Pins 7 and 8 via a resistor which determines the gain. The signal is amplified by the gain amplifier, operated by the tracking error amplifier and then the (F-E) signal is output to Pin 11.
RF1 260k 12p 220k I-V F
RF2 13k RF3 26k 30k 11 TE 30k 96k
7
RE1 260k RE2 13k 12p 220k I-V E
96k
8 RE3 26k 9 EI 270k R1 22k 4.7k R2
The balance adjustment is performed by varying the combined resistance value of the feedback resistors, which are T type-configured at the E I-V amplifier, by using the external resistance value of EI pin. F I-V amplifier feedback resistance value = RF1 + RF2 + RF1 x RF2 = 403k RF3
E I-V amplifier feedback resistance value = (RE1 // R1) + RE2 + (RE1 // R1) x RE2 (RE3 // R2) Leave EI pin open when the balance adjustment is not executed in this IC. The gain for F I-V and E I-V amplifiers becomes the same when EI pin is left open.
- 10 -
CXA2550M/N
Center Voltage Generation Circuit This circuit provides the center potential when this IC is used at single power supply. The maximum current is approximately 3mA. The output impedance is approximately 50.
VCC 30k 50 10 30k VEE VR
APC & Laser Power Control
VCC
R1 22
C2 100 LD 2 R6 1k 3 R10 56k R8 10k R4 10k VEE VEE R5 55k R11 10k VL R14 12.5k R12 56k VREF VEE VCC LD_ON MICROCOMPUTER
L1 10H
130mV PD R3 100
19
C1 1 LD GND PD
R2 500
RF I 16 C3 0.01
1.1Vp-p R7 6k 15 R9 54k VEE 50 670mV R15 13.4k
18
AGCCONT
MICROCOMPUTER
RF O
RF
17 RFTC R13 1M C4 1
1 AGCVTH
VEE VEE * APC When the laser diode is driven by a constant current, the optical power output has extremely large negative temperature characteristics. The APC circuit is used to maintain the optical power output at a constant level. The laser diode current is controlled according to the monitor photo diode output. APC is set to ON by connecting the LD_ON pin to VCC; OFF by connecting it to VCC.
- 11 -
CXA2550M/N
Application Circuit * For single power supply +3.5V
MICROCOMPUTER MICROCOMPUTER
+3.5V
SSP
SSP
R11
GND
0.1
1M
C3
0.01 20 19 18 17 16 15
5.5k 14 13 12
47k
FE_BIAS
RF O
GND
11 10 VC
33/6.3V
VCC
VCC
R9
FOCUS BIAS
AGCCONT
RFTC
RFM
VCC
AGCVTH
LD_ON
PD1
PD2
RF I
PD
VEE
FE
LD
1 100/6.3V
2
3
4
5
6
E
F
7
8
9
220k
33k
33k
R2
R3
R4
100
I_V
I_V
I_V
VCC
11
LD
10H
270k
GND
33/6.3V
R5
220k
R5
1/6.3V
500
C
A
D
B
VC
F
E
GND
GND
VC
* For dual power supply 1.75V
MICROCOMPUTER MICROCOMPUTER
+1.75V
4.7k
R5
22k
TRK E GAIN
PD
I_V
SSP
R11
GND
VCC
0.1
1M
C3
33/6.3V
VCC
0.01 20 19 18 17 16 15
5.5k 14 13
47k 12 11
FE_BIAS
RF O
VEE
R9
FOCUS BIAS
VEE
SSP
AGCCONT
RFTC
RFM
VCC
AGCVTH
LD_ON
PD1
PD2
RF I
PD
VEE
FE
LD
1 100/6.3V
2
3
4
5
6
E
F
7
8
9
10
220k
33k
33k
R2
R3
R4
220k
R5
100
33/6.3V
I_V
I_V
I_V
VCC
11
10H
LD
270k
VEE
GND TRK E GAIN
PD
1/6.3V
500
I_V
R5
C
A
D
B
GND
F
E
GND VEE
GND GND
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
- 12 -
4.7k
R5
22k
VC
EI
TE
SSP
VC
EI
TE
SSP
GND
CXA2550M/N
* LASER POWER CONTROL (LPC) The RF level is stabilized by attaching an offset to the APC VL and controlling the laser power in sync with the RF level fluctuations. The RF O and RF I levels are compared and the larger of the two is smoothed by the RFTC's external CR. This signal is then compared with the reference level. The laser power is controlled by attaching an offset to VL according to the results of comparison with the reference level. Set the reference level to 670mV. (center voltage reference) When the reference level is changed, connect the external resistor to the AGCVTH pin (Pin 1). The reference level can be lowered by connecting the resistor between Pin 1 and the center output voltage or between Pin 20 and VCC. The AGCCONT pin (pin 18) is used to switch the level of the laser power control circuit; OFF, ON (laser power limit of 30%) and ON (laser power limit of 50%) Note) For the laser power limit, 50% is recommended for PD IC; 30% for LC. AGCCONT H (VCC) M (VC or OPEN) L (VEE) LPC OFF ON ON LPC limit -- 30% 50% VL variable range Approximately 1.27V Approximately 1.27V 350mV Approximately 1.27V 570mV
Notes on Operation 1. Power supply The CXA2550M/N can be used either at dual power supply or single power supply. The table below shows the connection of power supply for each case. VCC Dual power supply Single power supply +power supply Power supply VEE -power supply GND VC GND OPEN
2. RF amplifier In this circuit, the IC internal phase compensation value is set so as to support the voltage output-type pickup. Therefore, when the current output-type pickup is used, the capacitance of optical pickup and leads etc. are attached to PD1 and PD2 pins and oscillation may occur. 3. laser power control The RF level is stabilized by attaching an offset to the APC VL and controlling the laser power in sync with the RF level fluctuations. Therefore, use this circuit in the state where the focus servo is applied. The laser life is shortened by increasing the laser power when the less light is reflected from the disc. It is recommended that the typical laser power value is set lower to maintain the laser life. Take care of the laser maximum ratings when using the laser power control circuit.
- 13 -
CXA2550M/N
Package Outline CXA2550M
Unit: mm
20PIN SOP (PLASTIC) 300mil
+ 0.4 12.45 - 0.1 20 11
+ 0.4 1.85 - 0.15
0.15
+ 0.3 5.3 - 0.1
7.9 0.4
+ 0.2 0.1 - 0.05
0.45 0.1
1.27
+ 0.1 0.2 - 0.05
0.12 M
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SOP-20P-L01 SOP020-P-0300-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY / PHENOL RESIN SOLDER PLATING COPPER ALLOY
0.3g
SCT Ass'y
20PIN SOP (PLASTIC) 300mil
+ 0.4 12.45 - 0.1 20 11
+ 0.4 1.85 - 0.15
0.5 0.2
0.15 + 0.2 0.1 - 0.05
1
10
+ 0.3 5.3 - 0.1
7.9 0.4
0.45 0.1
1.27
+ 0.1 0.2 - 0.05
0.12 M
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SOP-20P-L01 SOP020-P-0300-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY / PHENOL RESIN SOLDER PLATING COPPER ALLOY
0.3g
LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SOLDER COMPOSITION PLATING THICKNESS SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt% 5-18m
- 14 -
0.5 0.2
1
10
6.9
6.9
CXA2550M/N
Package Outline CXA2550N
Unit: mm
20PIN SSOP (PLASTIC)
6.5 0.1 + 0.2 1.25 - 0.1 0.1 20 11 A
4.4 0.1
1
10 0.65
b
0.13 M
b=0.22 0.03 0.1 0.1
0.5 0.2
DETAIL B : PALLADIUM
0 to 10 DETAIL A
NOTE: Dimension "" does not include mold protrusion.
PACKAGE STRUCTURE
PACKAGE MATERIAL EPOXY RESIN PALLADIUM PLATING COPPER ALLOY 0.1g
SONY CODE EIAJ CODE JEDEC CODE
SSOP-20P-L01 SSOP020-P-0044
LEAD TREATMENT LEAD MATERIAL PACKAGE MASS
- 15 -
+ 0.03 0.15 - 0.01
6.4 0.2
Sony Corporation

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